[PATCH] D33455: [AMDGPU] Combine and (srl) into shl (bfe)

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3482
+    if ((OffsetVal + WidthVal) >= 32 &&
+        !(Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS &&
+          OffsetVal == 16 && WidthVal == 16)) {
----------------
rampitec wrote:
> arsenm wrote:
> > There is an SDWA subtarget feature
> AMDGPUSubtarget does not know anything about SDWA, it is in SISubtarget.
The SDWA predicate could be moved into AMDGPUSUbtarget if needed here, there's nothing really requiring it be part of SISubtarget


Repository:
  rL LLVM

https://reviews.llvm.org/D33455