[PATCH] D33248: [Power9] Exploit D-form vector load/store

[Zaara Syeda via Phabricator via llvm-commits]

syzaara created this revision.

The new d-form vector load/store instructions lxv/stxv can be used in place of the x-form instructions lxvx/stxvx when the offset is an immediate. This patch adds the tlbgen patterns to exploit the new instructions. It also changes the existing instructions addressing mode from xoaddr to xaddr so a register + immediate can be selected rather than register + register only. This patch has also been functionally tested on Power9.


https://reviews.llvm.org/D33248

Files:
  lib/Target/PowerPC/PPCInstrVSX.td
  test/CodeGen/PowerPC/build-vector-tests.ll
  test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll
  test/CodeGen/PowerPC/ppc64-i128-abi.ll
  test/CodeGen/PowerPC/pr25157-peephole.ll
  test/CodeGen/PowerPC/swaps-le-6.ll
  test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll
  test/CodeGen/PowerPC/vsx-ldst.ll
  test/CodeGen/PowerPC/vsx-p9.ll
  test/CodeGen/PowerPC/vsx_insert_extract_le.ll
  test/CodeGen/PowerPC/vsx_shuffle_le.ll

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