[PATCH] D31516: Separate {Min, Max}AtomicLockFreeWidth from MaxAtomicInlineWidth

[Joerg Sonnenberger via Phabricator via llvm-commits]

joerg added a comment.

I don't get this. If you have a lock-free 32bit CAS, you can implement all the 16bit operations on top of that and they are still lock-free.


Repository:
  rL LLVM

https://reviews.llvm.org/D31516