[PATCH] D33230: [AArch64] Make instruction fusion more aggressive.

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 16 00:51:31 PDT 2017


fhahn created this revision.
Herald added subscribers: javed.absar, MatzeB, rengolin, aemerson.

This patch makes instruction fusion more aggressive by

- adding artificial edges between the successors of FirstSU and SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps.
- updating PostGenericScheduler::tryCandidate to keep clusters together, similar to GenericScheduler::tryCandidate.

This change increases the number of AES instruction pairs generated on
 Cortex-A57 and Cortex-A72. This doesn't change code at all in
 most benchmarks or general code, but we've seen improvement on kernels
 using AESE/AESMC and AESD/AESIMC.


https://reviews.llvm.org/D33230

Files:
  lib/CodeGen/MachineScheduler.cpp
  lib/Target/AArch64/AArch64MacroFusion.cpp
  lib/Target/AArch64/AArch64TargetMachine.cpp
  test/CodeGen/AArch64/misched-fusion-aes.ll

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