[PATCH] D33188: [X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove redundant shift left+right instructions).

Ayman Musa via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 15 04:36:19 PDT 2017


aymanmus created this revision.

AVX512 compare instructions return v*i1 types.
In cases where the number of elements in the returned value are less than 8, clang adds zeroes to get a mask of v8i1 type.
Later on it's replaced with CONCAT_VECTORS, which then is lowered to many DAG nodes including insert/extract element and shift right/left nodes.
The fact that AVX512 compare instructions put the result in a k register and **zeroes all its upper bits** allows us to remove the extra nodes by replacing the compare instruction node with similar node with v8i1 return type.
For example:

  t2: v4i1 = X86ISD::PCMPEQM t0, t1
  t3: v4i1 = BUILD_VECTOR Constant:i1<0>, Constant:i1<0>, Constant:i1<0>, Constant:i1<0>
  t4: v8i1 = concat_vectors t2, t3
  t5: i8 = bitcast t4

Would be replaced with:

  t2: v8i1 = X86ISD::PCMPEQM t0, t1
  t3: i8 = bitcast t2


https://reviews.llvm.org/D33188

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrFragmentsSIMD.td
  test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
  test/CodeGen/X86/avx512vl-vec-masked-cmp.ll

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