[PATCH] D33017: [PPC] Properly update register save area offsets

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

Do we have anything we can/want to test on 64-bit targets considering there's a change that presumably affects them (i.e. the update for the base pointer).

In any case, save for the 64-bit test case, this looks perfectly fine to me but I think I should defer the final OK to @hfinkel as he's way more familiar with this code than I am.



================
Comment at: lib/Target/PowerPC/PPCFrameLowering.cpp:1790
+
+    unsigned BP = RegInfo->getBaseRegister(MF);
+    if (PPC::G8RCRegClass.contains(BP)) {
----------------
I am frankly not familiar enough with the frame lowering code or the concept of the base pointer, but I think a comment here is in order.
I suppose that when a function has a base pointer and uses no callee-saved registers, we need a slot for the base pointer.


Repository:
  rL LLVM

https://reviews.llvm.org/D33017