[PATCH] D33076: [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the backend. NFC.

Kyle Butt via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 11 11:36:14 PDT 2017


iteratee added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrAltivec.td:990
           (v4i32 (VSLW $vA, $vB))>;
+def : Pat<(v16i8 (PPCshl v16i8:$vA, v16i8:$vB)),
+          (v16i8 (VSLB $vA, $vB))>;
----------------
timshen wrote:
> iteratee wrote:
> > Can these patterns go in a separate patch? They only seem partially related.
> They can, the problem is that there is no way to test that patch, since no one generates PPCshl on vector until this patch.
> 
> Do you think it'd be ok to have a separate patch being unable to test?
If you add the patterns, they should be generated. That was what happened when I added the vector shift patterns for v1i128


https://reviews.llvm.org/D33076





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