[PATCH] D33076: [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the backend. NFC.

[Tim Shen via Phabricator via llvm-commits]

timshen updated this revision to Diff 98566.
timshen added a comment.

32-bit instructions like slw has a subtly different behavior. Make the documentation refer back to the ISA, since it's the intention.


https://reviews.llvm.org/D33076

Files:
  llvm/include/llvm/Target/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td

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