[PATCH] D31724: [SelectionDAG] Remove special call to LHS computeKnownBits for ANDs with constant RHS.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 10 12:43:57 PDT 2017


craig.topper updated this revision to Diff 98505.
craig.topper added a comment.
Herald added a subscriber: javed.absar.

Rebase for recent changes.

I got a new regression failure in X86 for combine-and.ll. I suspect there's some missing known bits support on some target node, but I haven't looked into it yet.


https://reviews.llvm.org/D31724

Files:
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/AArch64/fast-isel-select.ll
  test/CodeGen/AMDGPU/fneg.f16.ll
  test/CodeGen/PowerPC/rlwimi-and.ll
  test/CodeGen/X86/combine-and.ll

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