[PATCH] D32907: [ELF] - Fix warnings when LLD compiled using gcc 7.1.0

[Rafael Avila de Espindola via llvm-commits]

LGTM

George Rimar via Phabricator <reviews at reviews.llvm.org> writes:

> grimar updated this revision to Diff 98437.
> grimar added a comment.
>
> - Addressed review comments.
>
> Together with https://reviews.llvm.org/D33036 this frees LLD from warnings when compiling with GCC 7.
>
>
> https://reviews.llvm.org/D32907
>
> Files:
>   ELF/Target.cpp
>
>
> Index: ELF/Target.cpp
> ===================================================================
> --- ELF/Target.cpp
> +++ ELF/Target.cpp
> @@ -1874,7 +1874,8 @@
>        // BLX (always unconditional) instruction to an ARM Target, select an
>        // unconditional BL.
>        write32le(Loc, 0xeb000000 | (read32le(Loc) & 0x00ffffff));
> -  // fall through as BL encoding is shared with B
> +    // fall through as BL encoding is shared with B
> +    LLVM_FALLTHROUGH;
>    case R_ARM_JUMP24:
>    case R_ARM_PC24:
>    case R_ARM_PLT32:
> @@ -1908,7 +1909,8 @@
>      }
>      // Bit 12 is 0 for BLX, 1 for BL
>      write16le(Loc + 2, (read16le(Loc + 2) & ~0x1000) | (Val & 1) << 12);
> -  // Fall through as rest of encoding is the same as B.W
> +    // Fall through as rest of encoding is the same as B.W
> +    LLVM_FALLTHROUGH;
>    case R_ARM_THM_JUMP24:
>      // Encoding B  T4, BL T1, BLX T2: Val = S:I1:I2:imm10:imm11:0
>      // FIXME: Use of I1 and I2 require v6T2ops
>
>
> Index: ELF/Target.cpp
> ===================================================================
> --- ELF/Target.cpp
> +++ ELF/Target.cpp
> @@ -1874,7 +1874,8 @@
>        // BLX (always unconditional) instruction to an ARM Target, select an
>        // unconditional BL.
>        write32le(Loc, 0xeb000000 | (read32le(Loc) & 0x00ffffff));
> -  // fall through as BL encoding is shared with B
> +    // fall through as BL encoding is shared with B
> +    LLVM_FALLTHROUGH;
>    case R_ARM_JUMP24:
>    case R_ARM_PC24:
>    case R_ARM_PLT32:
> @@ -1908,7 +1909,8 @@
>      }
>      // Bit 12 is 0 for BLX, 1 for BL
>      write16le(Loc + 2, (read16le(Loc + 2) & ~0x1000) | (Val & 1) << 12);
> -  // Fall through as rest of encoding is the same as B.W
> +    // Fall through as rest of encoding is the same as B.W
> +    LLVM_FALLTHROUGH;
>    case R_ARM_THM_JUMP24:
>      // Encoding B  T4, BL T1, BLX T2: Val = S:I1:I2:imm10:imm11:0
>      // FIXME: Use of I1 and I2 require v6T2ops