[PATCH] D32869: [globalisel][tablegen] Require that all registers between instructions of a match are virtual.

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added a comment.

In https://reviews.llvm.org/D32869#746617, @qcolombet wrote:

> If that happens, doesn't that means we need to support it?
>
> The way I was thinking about this was that we should be able to insert copy to vreg before and after to assign to and from the physical registers.


As far as I know, it can't occur in SelectionDAG patterns. The closest we get is COPY_TO_REGCLASS which is still a vreg.

I also don't think we need it for GlobalISel-specific rules for ISel. This code is intended to detect whether there's an instruction defining the operand we're trying to follow to the def. Physical registers typically occur at the calling convention and inline assembly boundaries and as such there's nothing on the other side of them for us to match in a rule. In the longer term, we'll need to rework it to be able to re-use tablegen after the register allocator but I think it's best to leave that until we've finished ISel.


https://reviews.llvm.org/D32869