[PATCH] D32953: [X86][SSE] Improve combineLogicBlendIntoPBLENDV to use general masks.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: test/CodeGen/X86/pr32907.ll:26
 ; AVX2-NEXT:    vpsrad $31, %xmm0, %xmm1
 ; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
 ; AVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
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delena wrote:
> I assume that ComputeNumSignBits() does not recognize the ASHR sequence here, otherwise it would be able to generate VPBLEND, right?
Exactly - this is an example of ones of the TODOs - the ANDNP is being generated at the same time that the ASHR_v2i64 is being lowered into the PSRAD+PSHUFD. If we could recognise the AND(XOR(-1,M), X) pattern earlier it would combine.

Note it wouldn't generate a VPBLEND, it would generate the SUB(XOR(X, M), M) pattern similar to the AVX512 codegen.


Repository:
  rL LLVM

https://reviews.llvm.org/D32953