[llvm] r302337 - [DAGCombiner] If ISD::ABS is legal/custom, use it directly instead of canonicalizing first.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sat May  6 08:44:42 2017
New Revision: 302337

URL: http://llvm.org/viewvc/llvm-project?rev=302337&view=rev
Log:
[DAGCombiner] If ISD::ABS is legal/custom, use it directly instead of canonicalizing first.

Remove an extra canonicalization step if ISD::ABS is going to be used anyway.

Updated x86 abs combine to check that we are lowering from both canonicalizations.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/combine-abs.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=302337&r1=302336&r2=302337&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat May  6 08:44:42 2017
@@ -6688,6 +6688,9 @@ SDValue DAGCombiner::visitVSELECT(SDNode
 
     if (isAbs) {
       EVT VT = LHS.getValueType();
+      if (TLI.isOperationLegalOrCustom(ISD::ABS, VT))
+        return DAG.getNode(ISD::ABS, DL, VT, LHS);
+
       SDValue Shift = DAG.getNode(
           ISD::SRA, DL, VT, LHS,
           DAG.getConstant(VT.getScalarSizeInBits() - 1, DL, VT));

Modified: llvm/trunk/test/CodeGen/X86/combine-abs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-abs.ll?rev=302337&r1=302336&r2=302337&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-abs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-abs.ll Sat May  6 08:44:42 2017
@@ -27,10 +27,10 @@ define <8 x i16> @combine_v8i16_abs_abs(
 ; CHECK-NEXT:    vpabsw %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %a1 = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a)
-  %n2 = sub <8 x i16> zeroinitializer, %a1
-  %c2 = icmp slt <8 x i16> %a1, zeroinitializer
-  %a2 = select <8 x i1> %c2, <8 x i16> %n2, <8 x i16> %a1
-  ret <8 x i16> %a2
+  %s2 = ashr <8 x i16> %a1, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
+  %a2 = add <8 x i16> %a1, %s2
+  %x2 = xor <8 x i16> %a2, %s2
+  ret <8 x i16> %x2
 }
 
 define <32 x i8> @combine_v32i8_abs_abs(<32 x i8> %a) {