[PATCH] D32416: [x86, SSE] AVX1 PR28129

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: lib/Target/X86/X86InstrSSE.td:489
                        [(set VR128:$dst, (v4i32 immAllOnesV))]>;
+  let Predicates = [HasAVX1Only, OptForSize] in
+  def AVX1_SETALLONES: I<0, Pseudo, (outs VR256:$dst), (ins), "",
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spatel wrote:
> Should this be "OptForMinSize"? Ie, I was just looking at some other code patterns, and we are inserting xorps/xorpd even at -Os. 
> 
> In fact, we're doing that even at -Oz which I think is a mistake.
After thinking about this again, I'm now wondering why we would make the zero reg input a part of the patterns here. Are there any other td patterns that do this? For the most part, I think we handle the xor generation using ExecutionDepsFix.


https://reviews.llvm.org/D32416