[PATCH] D32636: [x86][inline-asm][llvm]Amend size directive deduction mechanism of unsized memory operands

[coby via Phabricator via llvm-commits]

coby created this revision.

This is an extension of the work being carried by the following change:
https://reviews.llvm.org/D26586
This commit handles cases where the size qualifier of an indirect memory reference operand in Intel syntax is missing (e.g. "vaddps xmm1, xmm2, [a]").
GCC will deduce the size qualifier based on the possible matches:
"vaddps xmm1, xmm2, [a]" matches only “XMMWORD PTR” qualifier.
"vaddps xmm1, xmm2, [a]{1to4}" matches only “DWORD PTR” qualifier.
"mov rax, [a]" matches only "QWORD PTR"

Currently, size directive will be deduced based on the size of the memory operand (apart from those cases which were handled by https://reviews.llvm.org/D26586).
For example:
"vaddps xmm1, xmm2, [a]"
"char a;" will imply "BYTE PTR" qualifier
"short a;" will imply "WORD PTR" qualifier.

This commit aligns LLVM to GCC’s behavior.

This is the LLVM part of the review.
The Clang part of the review:


Repository:
  rL LLVM

https://reviews.llvm.org/D32636

Files:
  lib/Target/X86/AsmParser/X86AsmParser.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D32636.97053.patch
Type: text/x-patch
Size: 4436 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170428/db66244f/attachment.bin>