[PATCH] D32391: [SelectionDAG] Improve support for promotion of <1 x fX> floating point argument types (PR31008)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:564
+      Val = PartVT.isInteger() ? DAG.getAnyExtOrTrunc(Val, DL, PartVT)
+                               : DAG.getFPExtendOrRound(Val, DL, PartVT);
     }
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efriedma wrote:
> Unless I'm misreading this, we just set Val to an EXTRACT_VECTOR_ELT of type PartVT on the previous line; does this conversion do anything?
Good point - will remove this and add an assert to check that the Parts[0] has a PartVT value type.


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Comment at: test/CodeGen/X86/pr31088.ll:14
+; SSE-NEXT:    movzwl %ax, %edi
+; SSE-NEXT:    callq __gnu_h2f_ieee
+; SSE-NEXT:    movss %xmm0, (%rsp) # 4-byte Spill
----------------
efriedma wrote:
> This `__gnu_f2h_ieee` + `__gnu_h2f_ieee` sequence looks strange...
>From what I can tell, half args always come in as single precision floats and we don't guarantee that the floats are only set to half precision, so we have to truncate them - and then as we're performing arithmetic they must be extended back again to singles for the fadd.

Interestingly we don't bother truncating+extending the single results - we leave it with excess precision on return.


Repository:
  rL LLVM

https://reviews.llvm.org/D32391