[PATCH] D32275: [globalisel][tablegen] Add several GINodeEquiv's for operators that do not require additional support.

Diana Picus via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 25 03:46:41 PDT 2017


rovka added a comment.

In https://reviews.llvm.org/D32275#736537, @dsanders wrote:

> I decided to have a look at code coverage differences before committing this. This patch made no difference to the code coverage. On closer inspection it turns out beginFunction() isn't being executed so no rules with rule predicates can match. I'll take a look at this, maybe something from the rule-predicates patch didn't make it into the final commit.


I literally just ran into this while trying to enable TableGen for ARM. I'm wondering if it's really a good idea to have beginFunction in the first place. There's a related FIXME in TargetSubtargetInfo.h around getInstructionSelector. Maybe we should have an instruction selector per MachineFunction?

> A few other notable things in the coverage information:
> 
> - There's no coverage for 64-bit shifts.
> - There's no coverage for 8 or 16-bit FPU stores. That's not particularly surprising but I am surprised that there's an implementation for those sizes.
> - There's no coverage of 128-bit FPU copies
> - Most integer and FPU comparison predicates aren't covered.
> - There's no coverage for LOAD_STACK_GUARD
> - There's no coverage for G_TRUNC in the FPU register bank.




https://reviews.llvm.org/D32275





More information about the llvm-commits mailing list