[PATCH] D32364: [AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter

[Yaxun Liu via Phabricator via llvm-commits]

yaxunl created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, kzhuravl.

SI_MASKED_UNREACHABLE does not have machine instruction encoding.
It needs special handling in AMDGPUAsmPrinter::EmitInstruction like some
other pseudo instructions.

This patch fixes compilation failure of RadeonRays.


https://reviews.llvm.org/D32364

Files:
  lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll


Index: test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
@@ -0,0 +1,9 @@
+; RUN: llc -march amdgcn %s -filetype=obj 
+; RUN: llc -march amdgcn <%s | FileCheck %s
+define amdgpu_kernel void @f() {
+  ; CHECK: ; divergent unreachable
+  call void @llvm.amdgcn.unreachable()
+  ret void
+}
+
+declare void @llvm.amdgcn.unreachable()
Index: lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -225,6 +225,12 @@
       return;
     }
 
+    if (MI->getOpcode() == AMDGPU::SI_MASKED_UNREACHABLE) {
+      if (isVerbose())
+        OutStreamer->emitRawComment(" divergent unreachable");
+      return;
+    }
+
     MCInst TmpInst;
     MCInstLowering.lower(MI, TmpInst);
     EmitToStreamer(*OutStreamer, TmpInst);


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