[PATCH] D32273: [X86][AVX512] Make i1 illegal in the CodeGen

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I still need to look at this some more, but here a few comments.



================
Comment at: include/llvm/CodeGen/MachineValueType.h:58
 
-      v2i1           =  13,   //    2 x i1
-      v4i1           =  14,   //    4 x i1
-      v8i1           =  15,   //    8 x i1
-      v16i1          =  16,   //   16 x i1
-      v32i1          =  17,   //   32 x i1
-      v64i1          =  18,   //   64 x i1
-      v512i1         =  19,   //  512 x i1
-      v1024i1        =  20,   // 1024 x i1
-
-      v1i8           =  21,   //  1 x i8
-      v2i8           =  22,   //  2 x i8
-      v4i8           =  23,   //  4 x i8
-      v8i8           =  24,   //  8 x i8
-      v16i8          =  25,   // 16 x i8
-      v32i8          =  26,   // 32 x i8
-      v64i8          =  27,   // 64 x i8
-      v128i8         =  28,   //128 x i8
-      v256i8         =  29,   //256 x i8
-
-      v1i16          =  30,   //  1 x i16
-      v2i16          =  31,   //  2 x i16
-      v4i16          =  32,   //  4 x i16
-      v8i16          =  33,   //  8 x i16
-      v16i16         =  34,   // 16 x i16
-      v32i16         =  35,   // 32 x i16
-      v64i16         =  36,   // 64 x i16
-      v128i16        =  37,   //128 x i16
-
-      v1i32          =  38,   //  1 x i32
-      v2i32          =  39,   //  2 x i32
-      v4i32          =  40,   //  4 x i32
-      v8i32          =  41,   //  8 x i32
-      v16i32         =  42,   // 16 x i32
-      v32i32         =  43,   // 32 x i32
-      v64i32         =  44,   // 64 x i32
-
-      v1i64          =  45,   //  1 x i64
-      v2i64          =  46,   //  2 x i64
-      v4i64          =  47,   //  4 x i64
-      v8i64          =  48,   //  8 x i64
-      v16i64         =  49,   // 16 x i64
-      v32i64         =  50,   // 32 x i64
-
-      v1i128         =  51,   //  1 x i128
-
-      FIRST_INTEGER_VECTOR_VALUETYPE = v2i1,
+      v1i1           =  13,   //    2 x i1
+      v2i1           =  14,   //    2 x i1
----------------
This needs to be rebased on top of a commit that went in today that changed this for ScalableVector MVTs.


================
Comment at: include/llvm/CodeGen/MachineValueType.h:448
         llvm_unreachable("Value type is metadata.");
+      case v1i1:
       case i1  :  return 1;
----------------
Can you put the scalar type before the vector type? That would be more consistent with the other code.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:6318
       return Subtarget.hasBWI() ? X86::KMOVDrk : X86::KMOVWrk;
+    if (X86::GR16RegClass.contains(DestReg)) {
+      DestReg = getX86SubSuperRegister(DestReg, 32);
----------------
Why is this code coming back? We should use the right SUBREG operations in the output patterns so that we only do GR32/GR64 copies.


https://reviews.llvm.org/D32273