[PATCH] D24623: [AMDGPU] Implement memory model

[Tony Tye via Phabricator via llvm-commits]

t-tye added a subscriber: b-sumner.
t-tye added inline comments.


================
Comment at: lib/Target/AMDGPU/SIMemoryLegalizer.cpp:233
+        Ordering == AtomicOrdering::SequentiallyConsistent)
+      Changed |= InsertBufferWbinvl1Vol(MI);
+
----------------
I believe a waitcnt vmem(0) is required before the InsertBufferWbinvl1Vol to ensure any previous atomic load has completed that the fence will pair with to create a synchronizes-with relation.


https://reviews.llvm.org/D24623