[PATCH] D31331: [mips][msa] Truncation of vector elements for instructions creating ISD::SHL, ISD::SRL or ISD::SRA nodes

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 19 03:11:42 PDT 2017


sdardis accepted this revision.
sdardis added a comment.

LGTM, you'll need @efriedma to accept this as well before this revision can be closed.



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Comment at: lib/Target/Mips/MipsMSAInstrInfo.td:3843-3861
+def : MSAPat<(xor v16i8:$ws, (shl vsplat_imm_eq_1, (vsplati8imm7 v16i8:$wt))),
+             (v16i8 (BNEG_B v16i8:$ws, v16i8:$wt))>;
+def : MSAPat<(xor v8i16:$ws, (shl vsplat_imm_eq_1, (vsplati16imm15 v8i16:$wt))),
+             (v8i16 (BNEG_H v8i16:$ws, v8i16:$wt))>;
+def : MSAPat<(xor v4i32:$ws, (shl vsplat_imm_eq_1, (vsplati32imm31 v4i32:$wt))),
+             (v4i32 (BNEG_W v4i32:$ws, v4i32:$wt))>;
+def : MSAPat<(xor v2i64:$ws, (shl (v2i64 vsplati64_imm_eq_1),
----------------
Nit: These can be redone as a multiclass pattern parametrized over the SDNode and instruction, similar to what you did with the MSAShiftPats.


https://reviews.llvm.org/D31331





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