[llvm] r300236 - [InstCombine] fold X == 0 || X == -1 to one compare (PR32524)

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Thu Apr 13 13:47:06 2017
New Revision: 300236

URL: http://llvm.org/viewvc/llvm-project?rev=300236&view=rev
Log:
[InstCombine] fold X == 0 || X == -1 to one compare (PR32524)

This is effectively a retry of:
https://reviews.llvm.org/rL299851
but now we have tests and an assert to make sure the bug
that was exposed with that attempt will not happen again.

I'll fix the code duplication and missing sibling fold next,
but I want to make this change as small as possible to reduce
risk since I messed it up last time.

This should fix:
https://bugs.llvm.org/show_bug.cgi?id=32524

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    llvm/trunk/test/Transforms/InstCombine/or.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=300236&r1=300235&r2=300236&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Thu Apr 13 13:47:06 2017
@@ -878,7 +878,7 @@ Value *InstCombiner::FoldAndOfICmps(ICmp
       return RHS;
     case ICmpInst::ICMP_NE:
       // Special case to get the ordering right when the values wrap around
-      // zero.
+      // zero. Ie, we assumed the constants were unsigned when swapping earlier.
       if (LHSC->getValue() == 0 && RHSC->getValue().isAllOnesValue())
         std::swap(LHSC, RHSC);
       if (LHSC == SubOne(RHSC)) {
@@ -1785,6 +1785,10 @@ Value *InstCombiner::FoldOrOfICmps(ICmpI
         }
       }
 
+      // Special case to get the ordering right when the values wrap around
+      // zero. Ie, we assumed the constants were unsigned when swapping earlier.
+      if (LHSC->getValue() == 0 && RHSC->getValue().isAllOnesValue())
+        std::swap(LHSC, RHSC);
       if (LHSC == SubOne(RHSC)) {
         // (X == 13 | X == 14) -> X-13 <=u 1
         // An 'add' is the canonical IR form, so favor that over a 'sub'.

Modified: llvm/trunk/test/Transforms/InstCombine/or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/or.ll?rev=300236&r1=300235&r2=300236&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/or.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/or.ll Thu Apr 13 13:47:06 2017
@@ -271,10 +271,9 @@ define i1 @cmp_eq_with_diff_one(i8 %x) {
 
 define i1 @cmp_eq_with_diff_one_signed(i32 %x) {
 ; CHECK-LABEL: @cmp_eq_with_diff_one_signed(
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i32 %x, -1
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 %x, 0
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
-; CHECK-NEXT:    ret i1 [[OR]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 %x, 1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 2
+; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %cmp1 = icmp eq i32 %x, -1
   %cmp2 = icmp eq i32 %x, 0