[llvm] r300184 - [X86] Change instructions names to keep consistency with the naming convention. NFC

[Ayman Musa via llvm-commits]

Author: aymanmus
Date: Thu Apr 13 04:12:32 2017
New Revision: 300184

URL: http://llvm.org/viewvc/llvm-project?rev=300184&view=rev
Log:
[X86] Change instructions names to keep consistency with the naming convention. NFC

Differential Revision: https://reviews.llvm.org/D31743


Modified:
    llvm/trunk/cmake/modules/AddLLVM.cmake
    llvm/trunk/lib/Target/X86/X86InstrVMX.td

Modified: llvm/trunk/cmake/modules/AddLLVM.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/AddLLVM.cmake?rev=300184&r1=300183&r2=300184&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/AddLLVM.cmake (original)
+++ llvm/trunk/cmake/modules/AddLLVM.cmake Thu Apr 13 04:12:32 2017
@@ -1213,7 +1213,8 @@ function(add_lit_testsuites project dire
       endif()
       string(FIND ${lit_suite} Inputs is_inputs)
       string(FIND ${lit_suite} Output is_output)
-      if (NOT (is_inputs EQUAL -1 AND is_output EQUAL -1))
+      string(FIND ${lit_suite} .svn is_svn)
+      if (NOT (is_inputs EQUAL -1 AND is_output EQUAL -1 AND is_svn EQUAL -1))
         continue()
       endif()
 

Modified: llvm/trunk/lib/Target/X86/X86InstrVMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrVMX.td?rev=300184&r1=300183&r2=300184&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrVMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrVMX.td Thu Apr 13 04:12:32 2017
@@ -43,11 +43,11 @@ def VMPTRLDm : I<0xC7, MRM6m, (outs), (i
   "vmptrld\t$vmcs", []>, PS;
 def VMPTRSTm : I<0xC7, MRM7m, (outs), (ins i64mem:$vmcs),
   "vmptrst\t$vmcs", []>, TB;
-def VMREAD64rm : I<0x78, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
+def VMREAD64mr : I<0x78, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
   "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
 def VMREAD64rr : I<0x78, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
   "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
-def VMREAD32rm : I<0x78, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
+def VMREAD32mr : I<0x78, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
   "vmread{l}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[Not64BitMode]>;
 def VMREAD32rr : I<0x78, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
   "vmread{l}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[Not64BitMode]>;