[llvm] r299988 - [DAGCombine] Add more test cases for shuffle of splat. NFC.

Zvi Rackover via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 11 14:17:00 PDT 2017


Author: zvi
Date: Tue Apr 11 16:16:59 2017
New Revision: 299988

URL: http://llvm.org/viewvc/llvm-project?rev=299988&view=rev
Log:
[DAGCombine] Add more test cases for shuffle of splat. NFC.

Tests added contain splat-masks with undef elements.

Modified:
    llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll

Modified: llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll?rev=299988&r1=299987&r2=299988&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shuffle-of-splat-multiuses.ll Tue Apr 11 16:16:59 2017
@@ -42,3 +42,59 @@ define <8 x float> @foo8(<8 x float> %v,
   store <8 x float> %res, <8 x float>* %p
   ret <8 x float> %res1
 }
+
+define <4 x i32> @undef_splatmask(<4 x i32> %v) nounwind {
+; AVX2-LABEL: undef_splatmask:
+; AVX2:       # BB#0:
+; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,2,2,3]
+; AVX2-NEXT:    retq
+  %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef>
+  %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
+  ret <4 x i32> %res1
+}
+
+define <4 x i32> @undef_splatmask2(<4 x i32> %v) nounwind {
+; AVX2-LABEL: undef_splatmask2:
+; AVX2:       # BB#0:
+; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
+; AVX2-NEXT:    retq
+  %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 2, i32 undef>
+  %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
+  ret <4 x i32> %res1
+}
+
+define <4 x i32> @undef_splatmask3(<4 x i32> %v) nounwind {
+; AVX2-LABEL: undef_splatmask3:
+; AVX2:       # BB#0:
+; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,2,2,3]
+; AVX2-NEXT:    retq
+  %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef>
+  %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 3>
+  ret <4 x i32> %res1
+}
+
+define <4 x i32> @undef_splatmask4(<4 x i32> %v, <4 x i32>* %p) nounwind {
+; AVX2-LABEL: undef_splatmask4:
+; AVX2:       # BB#0:
+; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
+; AVX2-NEXT:    vmovdqa %xmm1, (%rdi)
+; AVX2-NEXT:    retq
+  %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef>
+  %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
+  store <4 x i32> %res, <4 x i32>* %p
+  ret <4 x i32> %res1
+}
+
+define <4 x i32> @undef_splatmask5(<4 x i32> %v, <4 x i32>* %p) nounwind {
+; AVX2-LABEL: undef_splatmask5:
+; AVX2:       # BB#0:
+; AVX2-NEXT:    vpbroadcastq %xmm0, %xmm1
+; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
+; AVX2-NEXT:    vmovdqa %xmm1, (%rdi)
+; AVX2-NEXT:    retq
+  %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 undef>
+  %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 3>
+  store <4 x i32> %res, <4 x i32>* %p
+  ret <4 x i32> %res1
+}




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