[PATCH] D31872: AMDGPU: Minor SReg64 register class refactoring

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 10 15:38:38 PDT 2017

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arsenm added a comment.

While you're working on this, can you implement TargetRegisterInfo::isConstantPhysReg for these?


https://reviews.llvm.org/D31872

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