[llvm] r299763 - [SystemZ] Check for presence of vector support in SystemZISelLowering

[Jonas Paulsson via llvm-commits]

Author: jonpa
Date: Fri Apr  7 07:35:11 2017
New Revision: 299763

URL: http://llvm.org/viewvc/llvm-project?rev=299763&view=rev
Log:
[SystemZ]  Check for presence of vector support in SystemZISelLowering

A test case was found with llvm-stress that caused DAGCombiner to crash
when compiling for an older subtarget without vector support.

SystemZTargetLowering::combineTruncateExtract() should do nothing for older
subtargets.

This check was placed in canTreatAsByteVector(), which also helps in a few
other places.

Review: Ulrich Weigand

Added:
    llvm/trunk/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll
Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=299763&r1=299762&r2=299763&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Fri Apr  7 07:35:11 2017
@@ -4736,8 +4736,11 @@ const char *SystemZTargetLowering::getTa
 }
 
 // Return true if VT is a vector whose elements are a whole number of bytes
-// in width.
-static bool canTreatAsByteVector(EVT VT) {
+// in width. Also check for presence of vector support.
+bool SystemZTargetLowering::canTreatAsByteVector(EVT VT) const {
+  if (!Subtarget.hasVector())
+    return false;
+
   return VT.isVector() && VT.getScalarSizeInBits() % 8 == 0 && VT.isSimple();
 }
 

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h?rev=299763&r1=299762&r2=299763&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h Fri Apr  7 07:35:11 2017
@@ -537,6 +537,7 @@ private:
                                  unsigned UnpackHigh) const;
   SDValue lowerShift(SDValue Op, SelectionDAG &DAG, unsigned ByScalar) const;
 
+  bool canTreatAsByteVector(EVT VT) const;
   SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
                          unsigned Index, DAGCombinerInfo &DCI,
                          bool Force) const;

Added: llvm/trunk/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll?rev=299763&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll Fri Apr  7 07:35:11 2017
@@ -0,0 +1,18 @@
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=zEC12 < %s  | FileCheck %s
+;
+; Check that DAGCombiner doesn't crash in SystemZ combineTruncateExtract()
+; when handling EXTRACT_VECTOR_ELT without vector support.
+
+define void @autogen_SD21598(<2 x i8> %Arg) {
+; CHECK:	stc	%r3, 0(%r1)
+; CHECK:	j	.LBB0_1
+
+entry:
+  br label %loop
+
+loop:                                            ; preds = %CF249, %CF247
+  %Shuff = shufflevector <2 x i8> undef, <2 x i8> %Arg, <2 x i32> <i32 3, i32 1>
+  %E = extractelement <2 x i8> %Shuff, i32 0
+  store i8 %E, i8* undef
+  br label %loop
+}