[PATCH] D31161: [AMDGPU] New Waitcnt Insertion Pass

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIInsertWaitcnts.cpp:423
+  }
+  // TODO: Handle TTMP
+  // else if (TRI->isTTMP(MRIA, Reg.getReg())) ...
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t-tye wrote:
> Could M0, EXEC, etc. also potentially be a source or dest for SMEM and VMEM load/store?
> 
> Perhaps add an assert to ensure they never happen.
Those can't even be encoded for VMEM. M0 isn't in an allocatable class, and exec is reserved so neither one will appear there either. They are also disallowed by the operand constraints so will be a verifier error


https://reviews.llvm.org/D31161