[llvm] r299582 - [Hexagon] Use -mattr to select HVX mode in a testcase, NFC

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 5 12:46:37 PDT 2017


Author: kparzysz
Date: Wed Apr  5 14:46:37 2017
New Revision: 299582

URL: http://llvm.org/viewvc/llvm-project?rev=299582&view=rev
Log:
[Hexagon] Use -mattr to select HVX mode in a testcase, NFC

Modified:
    llvm/trunk/test/CodeGen/Hexagon/eliminate-pred-spill.ll

Modified: llvm/trunk/test/CodeGen/Hexagon/eliminate-pred-spill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/eliminate-pred-spill.ll?rev=299582&r1=299581&r2=299582&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/eliminate-pred-spill.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/eliminate-pred-spill.ll Wed Apr  5 14:46:37 2017
@@ -1,5 +1,4 @@
-; RUN: llc -march=hexagon -mcpu=hexagonv60 -enable-hexagon-hvx-double \
-; RUN:     -hexagon-bit=0 < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-bit=0 < %s | FileCheck %s
 
 ; This spill should be eliminated.
 ; CHECK-NOT: vmem(r29+#6)
@@ -140,5 +139,5 @@ declare <64 x i32> @llvm.hexagon.V6.vmpy
 
 declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #1
 
-attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-double" }
 attributes #1 = { nounwind readnone }




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