[PATCH] D31589: [AMDGPU] Add A5 to data layout for amdgiz environment

Yaxun Liu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 2 19:43:55 PDT 2017


yaxunl created this revision.
Herald added subscribers: tpr, dstuttard, nhaehnle, wdng, kzhuravl.

This patch changes alloca address space to be 5 for amdgiz environment.

It depends on https://reviews.llvm.org/D31042


https://reviews.llvm.org/D31589

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  test/CodeGen/AMDGPU/env-amdgiz.ll
  test/CodeGen/AMDGPU/env-amdgizcl.ll


Index: test/CodeGen/AMDGPU/env-amdgizcl.ll
===================================================================
--- test/CodeGen/AMDGPU/env-amdgizcl.ll
+++ test/CodeGen/AMDGPU/env-amdgizcl.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdgizcl -verify-machineinstrs < %s
 ; Just check the target feature and data layout is accepted without error.
 
-target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5"
 target triple = "amdgcn-amd-amdhsa-amdgizcl"
 
 define void @foo() {
Index: test/CodeGen/AMDGPU/env-amdgiz.ll
===================================================================
--- test/CodeGen/AMDGPU/env-amdgiz.ll
+++ test/CodeGen/AMDGPU/env-amdgiz.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdgiz -verify-machineinstrs < %s
 ; Just check the target feature and data layout is accepted without error.
 
-target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5"
 target triple = "amdgcn-amd-amdhsa-amdgiz"
 
 define void @foo() {
Index: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -214,7 +214,7 @@
       TT.getEnvironmentName() == "amdgizcl")
     return "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
          "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
-         "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
+         "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5";
   return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
       "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
       "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";


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