[llvm] r299328 - [X86][MMX] Add generic fptosi 4f32-4i32 test

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sun Apr  2 08:10:20 2017
New Revision: 299328

URL: http://llvm.org/viewvc/llvm-project?rev=299328&view=rev
Log:
[X86][MMX] Add generic fptosi 4f32-4i32 test

Modified:
    llvm/trunk/test/CodeGen/X86/mmx-cvt.ll

Modified: llvm/trunk/test/CodeGen/X86/mmx-cvt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-cvt.ll?rev=299328&r1=299327&r2=299328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-cvt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-cvt.ll Sun Apr  2 08:10:20 2017
@@ -187,6 +187,45 @@ define void @cvtt_v2f32_v2i32(<4 x float
   ret void
 }
 
+define void @fptosi_v4f32_v4i32(<4 x float>, <1 x i64>*) nounwind {
+; X86-LABEL: fptosi_v4f32_v4i32:
+; X86:       # BB#0:
+; X86-NEXT:    pushl %ebp
+; X86-NEXT:    movl %esp, %ebp
+; X86-NEXT:    andl $-8, %esp
+; X86-NEXT:    subl $16, %esp
+; X86-NEXT:    movl 8(%ebp), %eax
+; X86-NEXT:    cvttps2dq %xmm0, %xmm0
+; X86-NEXT:    movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT:    movq {{[0-9]+}}(%esp), %mm0
+; X86-NEXT:    paddd %mm0, %mm0
+; X86-NEXT:    movq %mm0, (%esp)
+; X86-NEXT:    movl (%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl %edx, 4(%eax)
+; X86-NEXT:    movl %ecx, (%eax)
+; X86-NEXT:    movl %ebp, %esp
+; X86-NEXT:    popl %ebp
+; X86-NEXT:    retl
+;
+; X64-LABEL: fptosi_v4f32_v4i32:
+; X64:       # BB#0:
+; X64-NEXT:    cvttps2dq %xmm0, %xmm0
+; X64-NEXT:    movlps %xmm0, -{{[0-9]+}}(%rsp)
+; X64-NEXT:    movq -{{[0-9]+}}(%rsp), %mm0
+; X64-NEXT:    paddd %mm0, %mm0
+; X64-NEXT:    movq %mm0, (%rdi)
+; X64-NEXT:    retq
+  %3 = fptosi <4 x float> %0 to <4 x i32>
+  %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
+  %5 = bitcast <2 x i32> %4 to x86_mmx
+  %6 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %5, x86_mmx %5)
+  %7 = bitcast x86_mmx %6 to i64
+  %8 = insertelement <1 x i64> undef, i64 %7, i32 0
+  store <1 x i64> %8, <1 x i64>* %1
+  ret void
+}
+
 define void @fptosi_v2f32_v2i32(<4 x float>, <1 x i64>*) nounwind {
 ; X86-LABEL: fptosi_v2f32_v2i32:
 ; X86:       # BB#0: