[PATCH] D31520: AMDGPU/R600: Fix amdgpu alias analysis pass.

Jan Vesely via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 30 20:08:41 PDT 2017


jvesely updated this revision to Diff 93579.
jvesely added a comment.

v2: Return after reporting fatal error


Repository:
  rL LLVM

https://reviews.llvm.org/D31520

Files:
  lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
  lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
  test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
  test/CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll


Index: test/CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll
@@ -0,0 +1,8 @@
+; RUN: opt -mtriple=r600-- -O3 -aa-eval -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
+
+; CHECK: NoAlias:      i8 addrspace(7)* %p1, i8* %p
+
+define amdgpu_kernel void @test(i8* %p, i8 addrspace(7)* %p1) {
+  ret void
+}
+
Index: test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
===================================================================
--- test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
+++ test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
@@ -1,4 +1,5 @@
 ; RUN: opt -mtriple=amdgcn-- -O3 -aa-eval -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=r600-- -O3 -aa-eval -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
 
 ; CHECK: NoAlias:      i8 addrspace(1)* %p1, i8* %p
 
Index: lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
+++ lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
@@ -30,7 +30,7 @@
 
 public:
   explicit AMDGPUAAResult(const DataLayout &DL, Triple T) : AAResultBase(),
-    DL(DL), AS(AMDGPU::getAMDGPUAS(T)), ASAliasRules(AS) {}
+    DL(DL), AS(AMDGPU::getAMDGPUAS(T)), ASAliasRules(AS, T.getArch()) {}
   AMDGPUAAResult(AMDGPUAAResult &&Arg)
       : AAResultBase(std::move(Arg)), DL(Arg.DL), AS(Arg.AS),
         ASAliasRules(Arg.ASAliasRules){}
@@ -49,9 +49,10 @@
 
   class ASAliasRulesTy {
   public:
-    ASAliasRulesTy(AMDGPUAS AS_);
+    ASAliasRulesTy(AMDGPUAS AS_, Triple::ArchType Arch_);
     AliasResult getAliasResult(unsigned AS1, unsigned AS2) const;
   private:
+    Triple::ArchType Arch;
     AMDGPUAS AS;
     const AliasResult (*ASAliasRules)[6][6];
   } ASAliasRules;
Index: lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
+++ lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
@@ -38,7 +38,8 @@
 }
 
 // Must match the table in getAliasResult.
-AMDGPUAAResult::ASAliasRulesTy::ASAliasRulesTy(AMDGPUAS AS_) : AS(AS_) {
+AMDGPUAAResult::ASAliasRulesTy::ASAliasRulesTy(AMDGPUAS AS_, Triple::ArchType Arch_)
+  : Arch(Arch_), AS(AS_) {
   // These arrarys are indexed by address space value
   // enum elements 0 ... to 5
   static const AliasResult ASAliasRulesPrivIsZero[6][6] = {
@@ -80,8 +81,12 @@
 
 AliasResult AMDGPUAAResult::ASAliasRulesTy::getAliasResult(unsigned AS1,
     unsigned AS2) const {
-  if (AS1 > AS.MAX_COMMON_ADDRESS || AS2 > AS.MAX_COMMON_ADDRESS)
-    report_fatal_error("Pointer address space out of range");
+  if (AS1 > AS.MAX_COMMON_ADDRESS || AS2 > AS.MAX_COMMON_ADDRESS) {
+    if (Arch == Triple::amdgcn)
+      report_fatal_error("Pointer address space out of range");
+    return AS1 == AS2 ? MayAlias : NoAlias;
+  }
+
   return (*ASAliasRules)[AS1][AS2];
 }
 


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