[PATCH] D30941: Better testing of schedule model instruction latencies/throughputs

Andrew V. Tischenko via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 30 10:01:10 PDT 2017


avt77 updated this revision to Diff 93498.
avt77 added a comment.
Herald added a reviewer: javed.absar.

The problem with failed tests raised because of new lines of comments added as result of this patch. I was wrong when I told that FileCheck does not allow adding of new comments at EOL.
I redesigned the patch to make it possible to add Latency:Throughput at the end of exisiting comment (if any). As result I was forced to change API of EmitInstruction from MCStreamer. I don't like this change because there are a lot of successors of MCStreamer but it works perfectly and maybe useful for other targets.
I regenerated (with help of update_llc_test_checks.py) 34 tests and now we have only 16 failed tests: I'm going to fix them asap.


https://reviews.llvm.org/D30941

Files:
  include/llvm/CodeGen/AsmPrinter.h
  include/llvm/CodeGen/TargetSchedule.h
  include/llvm/MC/MCObjectStreamer.h
  include/llvm/MC/MCStreamer.h
  include/llvm/MC/MCSubtargetInfo.h
  include/llvm/Target/TargetSubtargetInfo.h
  lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  lib/CodeGen/TargetSchedule.cpp
  lib/MC/MCAsmStreamer.cpp
  lib/MC/MCObjectStreamer.cpp
  lib/MC/MCStreamer.cpp
  lib/Object/RecordStreamer.cpp
  lib/Object/RecordStreamer.h
  lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
  lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
  lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
  lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.h
  lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
  lib/Target/Mips/MCTargetDesc/MipsELFStreamer.h
  lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
  lib/Target/X86/InstPrinter/X86InstComments.cpp
  lib/Target/X86/InstPrinter/X86InstComments.h
  lib/Target/X86/X86MCInstLower.cpp
  lib/Target/X86/X86Subtarget.cpp
  lib/Target/X86/X86Subtarget.h
  test/CodeGen/X86/2011-10-21-widen-cmp.ll
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/avx-intrinsics-x86.ll
  test/CodeGen/X86/avx-intrinsics-x86_64.ll
  test/CodeGen/X86/avx2-intrinsics-x86.ll
  test/CodeGen/X86/avx512-bugfix-23634.ll
  test/CodeGen/X86/avx512-bugfix-25270.ll
  test/CodeGen/X86/avx512-cmp.ll
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/avx512-mask-zext-bugfix.ll
  test/CodeGen/X86/avx512-mov.ll
  test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
  test/CodeGen/X86/avx512dqvl-intrinsics.ll
  test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
  test/CodeGen/X86/avx512vl-intrinsics.ll
  test/CodeGen/X86/compress_expand.ll
  test/CodeGen/X86/fma.ll
  test/CodeGen/X86/fp128-i128.ll
  test/CodeGen/X86/illegal-bitfield-loadstore.ll
  test/CodeGen/X86/memset-2.ll
  test/CodeGen/X86/mul-i256.ll
  test/CodeGen/X86/pr21792.ll
  test/CodeGen/X86/pr32241.ll
  test/CodeGen/X86/pr32256.ll
  test/CodeGen/X86/pr32329.ll
  test/CodeGen/X86/pr32451.ll
  test/CodeGen/X86/setcc-lowering.ll
  test/CodeGen/X86/sse41-intrinsics-x86.ll
  test/CodeGen/X86/vec_fpext.ll
  test/CodeGen/X86/vector-shuffle-128-v16.ll
  test/CodeGen/X86/vector-shuffle-256-v16.ll
  test/CodeGen/X86/vector-shuffle-256-v32.ll
  test/CodeGen/X86/vector-shuffle-avx512.ll
  test/CodeGen/X86/xaluo.ll

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