[llvm] r298926 - [x86] add separate check prefix for SSE; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 28 08:55:50 PDT 2017


Author: spatel
Date: Tue Mar 28 10:55:50 2017
New Revision: 298926

URL: http://llvm.org/viewvc/llvm-project?rev=298926&view=rev
Log:
[x86] add separate check prefix for SSE; NFC

We want to check each test on each target, so we need another prefix
when SSE and AVX diverge (as they will if we handle 32-byte and higher). 

Modified:
    llvm/trunk/test/CodeGen/X86/memcmp.ll

Modified: llvm/trunk/test/CodeGen/X86/memcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp.ll?rev=298926&r1=298925&r2=298926&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/memcmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memcmp.ll Tue Mar 28 10:55:50 2017
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=SSE2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=AVX2 | FileCheck %s --check-prefix=X64 --check-prefix=AVX2
 
 ; This tests codegen time inlining/optimization of memcmp
@@ -178,6 +178,16 @@ define i1 @length16(i8* %x, i8* %y) noun
 ; X32-NEXT:    setne %al
 ; X32-NEXT:    retl
 ;
+; SSE2-LABEL: length16:
+; SSE2:       # BB#0:
+; SSE2-NEXT:    movdqu (%rsi), %xmm0
+; SSE2-NEXT:    movdqu (%rdi), %xmm1
+; SSE2-NEXT:    pcmpeqb %xmm0, %xmm1
+; SSE2-NEXT:    pmovmskb %xmm1, %eax
+; SSE2-NEXT:    cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT:    setne %al
+; SSE2-NEXT:    retq
+;
 ; AVX2-LABEL: length16:
 ; AVX2:       # BB#0:
 ; AVX2-NEXT:    vmovdqu (%rdi), %xmm0
@@ -204,6 +214,15 @@ define i1 @length16_const(i8* %X, i32* n
 ; X32-NEXT:    sete %al
 ; X32-NEXT:    retl
 ;
+; SSE2-LABEL: length16_const:
+; SSE2:       # BB#0:
+; SSE2-NEXT:    movdqu (%rdi), %xmm0
+; SSE2-NEXT:    pcmpeqb {{.*}}(%rip), %xmm0
+; SSE2-NEXT:    pmovmskb %xmm0, %eax
+; SSE2-NEXT:    cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT:    sete %al
+; SSE2-NEXT:    retq
+;
 ; AVX2-LABEL: length16_const:
 ; AVX2:       # BB#0:
 ; AVX2-NEXT:    vmovdqu (%rdi), %xmm0




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