[llvm] r298652 - Move spill size and alignment info from MC to TargetRegisterInfo

[Krzysztof Parzyszek via llvm-commits]

Committed the updated version in r298739.

The function MCRegisterClass:getSize() is still there to avoid build 
breakages, but it returns MCRegisterClass::getPhysRegSize().

-Krzysztof


On 3/24/2017 3:13 PM, Quentin Colombet wrote:
> Great!
> That was what I was suggesting :).
>
>> On Mar 24, 2017, at 1:12 PM, Krzysztof Parzyszek via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>>
>> This is what I can propose:
>> - TargetRegisterInfo's information will continue to develop as planned.
>> - MCRegisterClass will retain register size, which will be set to the actual value for classes that are not parametrized, and 0 for those that are.
>> - MCRegisterClass::getSize will become getPhysRegSize.
>>
>> -Krzysztof
>>
>>
>>
>> On 3/24/2017 2:51 PM, Krzysztof Parzyszek via llvm-commits wrote:
>>> On 3/24/2017 2:44 PM, Quentin Colombet wrote:
>>>> Of course! Like I said, I believe the patch you suggested looks good
>>>> modulo keeping the MC getSize piece and renaming the TRI getSpillSize.
>>>
>>> That will not work very well.  Register size, spill slot size, spill
>>> slot alignment and MVTs associated with a register class will all be
>>> dependent on subtarget flags.  Putting any of it in MC at this point is
>>> going to have a significant impact on the design, let alone all the work
>>> I have done so far.
>>>
>>> -Krzysztof
>>>
>>
>> --
>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at lists.llvm.org
>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
hosted by The Linux Foundation