[PATCH] D31347: [X86][SSE] Generalised CMP+AND1 combine to ZERO/ALLBITS+MASK

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.

Patch to generalize combinePCMPAnd1 (for handling SETCC + ZEXT cases) to work for any input that has zero/all bits set masked with an 'all low bits' mask.

Replaced the implicit assumption of shift availability with a call to SupportedVectorShiftWithImm and added support to ComputeNumSignBitsForTargetNode for SSE arithmetic shifts.


Repository:
  rL LLVM

https://reviews.llvm.org/D31347

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/combine-and.ll

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