[PATCH] D31311: [DAGCombiner] Add vector demanded elements support to ComputeNumSignBits

Filipe Cabecinhas via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 24 09:39:59 PDT 2017


filcab added inline comments.


================
Comment at: test/CodeGen/X86/known-bits-vector.ll:41
 ; X64-NEXT:    vmovq %xmm0, %rax
-; X64-NEXT:    vcvtsi2ssq %rax, %xmm2, %xmm0
+; X64-NEXT:    vcvtsi2ssl %eax, %xmm2, %xmm0
 ; X64-NEXT:    retq
----------------
filcab wrote:
> I wouldn't expect tests to change when you're just avoiding work.
> Is this test hitting the `computeKnownBits(...)` case at the end of `computeNumSignBits` and has a non-trivial `DemandedElts`? (non-trivial would mean "not all 1s")
Nevermind. This can happen on the other ones, when the minimum won't be among as many elements as before.
Assuming this test uses the `EXTRACT_VECTOR_ELT`, we probably are missing one for `BUILD_VECTOR`.


Repository:
  rL LLVM

https://reviews.llvm.org/D31311





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