[PATCH] D31286: [X86] Fix Stale SDNode use in X86ISelDAGtoDAG

[Nirav Dave via Phabricator via llvm-commits]

niravd created this revision.

Fixes pr32329.


https://reviews.llvm.org/D31286

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  test/CodeGen/X86/pr32329.ll


Index: test/CodeGen/X86/pr32329.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/pr32329.ll
@@ -0,0 +1,62 @@
+; RUN: llc -mtriple=i686-unknown -mcpu=skx %s -o -
+; RUN: llc -mtriple=x86_64-unknown -mcpu=skx %s -o -
+
+%struct.AA = type { i24, [4 x i8] }
+
+ at obj = external local_unnamed_addr global %struct.AA, align 8
+ at var_27 = external local_unnamed_addr constant i8, align 1
+ at var_2 = external local_unnamed_addr constant i16, align 2
+ at var_24 = external local_unnamed_addr constant i64, align 8
+ at var_310 = external local_unnamed_addr global i64, align 8
+ at var_50 = external local_unnamed_addr global i64, align 8
+ at var_205 = external local_unnamed_addr global i8, align 1
+ at var_218 = external local_unnamed_addr global i8, align 1
+
+; Function Attrs: norecurse nounwind uwtable
+;define void @foo() local_unnamed_addr {
+define void @_Z3foov() local_unnamed_addr #0 {
+  entry:     
+  %bf.load = load i32, i32* bitcast (%struct.AA* @obj to i32*), align 8
+  %bf.clear = shl i32 %bf.load, 1
+  %add = and i32 %bf.clear, 8388606
+  %0 = load i8, i8* @var_27, align 1, !tbaa !1
+  %conv5 = sext i8 %0 to i32
+  %sub = sub nsw i32 %add, %conv5
+  %1 = load i16, i16* @var_2, align 2, !tbaa !4
+  %conv6 = zext i16 %1 to i32
+  %sub7 = sub nsw i32 %sub, %conv6
+  %conv8 = sext i32 %sub7 to i64
+  %2 = load i64, i64* @var_24, align 8, !tbaa !6
+  %3 = load i64, i64* @var_310, align 8, !tbaa !6
+  %conv9 = sext i8 %0 to i64
+  %mul = mul i64 %3, %conv9
+  %add10 = add i64 %mul, %2
+  %mul11 = mul i64 %add10, %conv8
+  %sub12 = add i64 %mul11, 8662905354777116273
+  %shl = shl i64 9, %sub12
+  store i64 %shl, i64* @var_50, align 8, !tbaa !6
+  %bf.clear14 = and i32 %bf.load, 4194303
+  %add21 = shl nuw nsw i32 %bf.clear14, 1
+  %sub23 = sub nsw i32 %add21, %conv5
+  %sub25 = sub nsw i32 %sub23, %conv6
+  %cmp = icmp sge i32 %sub25, %bf.clear14
+  %conv30 = zext i1 %cmp to i8
+  store i8 %conv30, i8* @var_205, align 1, !tbaa !1
+  %mul43 = mul nsw i32 %sub, %conv5
+  %conv44 = trunc i32 %mul43 to i8
+  store i8 %conv44, i8* @var_218, align 1, !tbaa !1
+  ret void
+}
+
+attributes #0 = { "target-cpu"="skx" }
+
+!llvm.ident = !{!0}
+
+!0 = !{!"clang version 5.0.0 (trunk 298511) (llvm/trunk 298531)"}
+!1 = !{!2, !2, i64 0}
+!2 = !{!"omnipotent char", !3, i64 0}
+!3 = !{!"Simple C++ TBAA"}
+!4 = !{!5, !5, i64 0}
+!5 = !{!"short", !2, i64 0}
+!6 = !{!7, !7, i64 0}
+!7 = !{!"long long", !2, i64 0}
Index: lib/Target/X86/X86ISelDAGToDAG.cpp
===================================================================
--- lib/Target/X86/X86ISelDAGToDAG.cpp
+++ lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -1335,8 +1335,8 @@
     AM.Scale = 1;
 
     // Insert the new nodes into the topological ordering.
-    insertDAGNode(*CurDAG, N, Zero);
-    insertDAGNode(*CurDAG, N, Neg);
+    insertDAGNode(*CurDAG, Handle.getValue(), Zero);
+    insertDAGNode(*CurDAG, Handle.getValue(), Neg);
     return false;
   }
 


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