[PATCH] D30941: Better testing of schedule model instruction latencies/throughputs
Andrew V. Tischenko via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 22 06:24:06 PDT 2017
avt77 updated this revision to Diff 92624.
avt77 added a comment.
I did everything accordingly to Hal's requirements except one: the default value of "print-schedule" switch is false because otherewise we have "Unexpected Failures: 530" and it's X86 tests ony. The problem is very simple: update_llc_test_checks.py generates CHECKs like here
; XOP-AVX1-NEXT: vextractf128 $1, %ymm2, %xmm5
It means FileCheck has to check the whole line but this patch adds the comment at the end of line and as result the line can't be checked properly.
Finaly what we have now:
- we have option "-print-schedule" allowing to print [latency:throughput" in output (default is false)
- we have enablePrintSchedInfo() - default is false
- X86 overrides enablePrintSchedInfo()
Hope that's exactly what was required.
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