[llvm] r298460 - [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.

Robinson, Paul via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 22 03:55:06 PDT 2017



> -----Original Message-----
> From: llvm-commits [mailto:llvm-commits-bounces at lists.llvm.org] On Behalf
> Of Ahmed Bougacha via llvm-commits
> Sent: Tuesday, March 21, 2017 4:43 PM
> To: llvm-commits at lists.llvm.org
> Subject: [llvm] r298460 - [GlobalISel] Update DBG_VALUEs referencing DCE'd
> instructions.
> 
> Author: ab
> Date: Tue Mar 21 18:42:54 2017
> New Revision: 298460
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=298460&view=rev
> Log:
> [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.
> 
> Quentin points out that r298358 would cause us to emit different code
> with debug info.  That's a big no-no; also erase the instructions that
> only live thanks to DBG_VALUE users.
> 
> Adrian explained how this is an existing problem and an OK thing to do:
> clang has allocas for all variables so shouldn't be affected at -O0, but
> swift uses a bit of inlineasm to explicitly keep values live for the
> purpose of debug info quality.  I'm not sure there is a better scheme.

We have been experimenting with a "fake-use" intrinsic to achieve this
effect.  This seems to help except when optimizations lose track of
variables, which is more often than anybody would like.  So, it's hard
to demonstrate the usefulness of the fake-use intrinsic until we can
manage to fix more of those places.  Eventually I'd like to get this
upstreamed, but it might be a while before we can show it's useful.
--paulr

> 
> Modified:
>     llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
>     llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp
>     llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
> 
> Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=298460
> &r1=298459&r2=298460&view=diff
> ==========================================================================
> ====
> --- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)
> +++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Tue Mar 21
> 18:42:54 2017
> @@ -123,7 +123,7 @@ bool InstructionSelect::runOnMachineFunc
>        // If so, erase it.
>        if (isTriviallyDead(MI, MRI)) {
>          DEBUG(dbgs() << "Is dead; erasing.\n");
> -        MI.eraseFromParent();
> +        MI.eraseFromParentAndMarkDBGValuesForRemoval();
>          continue;
>        }
> 
> 
> Modified: llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp?rev=298460&r1=298459&r
> 2=298460&view=diff
> ==========================================================================
> ====
> --- llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp (original)
> +++ llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp Tue Mar 21 18:42:54 2017
> @@ -61,8 +61,8 @@ bool llvm::isTriviallyDead(const Machine
>        continue;
> 
>      unsigned Reg = MO.getReg();
> -    // Keep Debug uses live: we don't want to have an effect on debug
> info.
> -    if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
> !MRI.use_empty(Reg))
> +    if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
> +        !MRI.use_nodbg_empty(Reg))
>        return false;
>    }
>    return true;
> 
> Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-dbg-
> value.mir?rev=298460&r1=298459&r2=298460&view=diff
> ==========================================================================
> ====
> --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
> (original)
> +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir Tue
> Mar 21 18:42:54 2017
> @@ -3,8 +3,13 @@
>  --- |
>    target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
> 
> -  define void @test_dbg_value() !dbg !5 {
> -    ; Keep the dbg metadata live by referencing it in the IR.
> +  define void @test_dbg_value(i32 %a) !dbg !5 {
> +    %tmp0 = add i32 %a, %a
> +    call void @llvm.dbg.value(metadata i32 %tmp0, i64 0, metadata !7,
> metadata !9), !dbg !10
> +    ret void
> +  }
> +
> +  define void @test_dbg_value_dead(i32 %a) !dbg !5 {
>      call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7,
> metadata !9), !dbg !10
>      ret void
>    }
> @@ -32,16 +37,33 @@
>  name:            test_dbg_value
>  legalized:       true
>  regBankSelected: true
> -# CHECK: registers:
> -# CHECK-NEXT:  - { id: 0, class: gpr32all }
> +body: |
> +  bb.0:
> +    liveins: %w0
> +    %0:gpr(s32) = COPY %w0
> +    %1:gpr(s32) = G_ADD %0, %0
> +    %w0 = COPY %1(s32)
> +
> +    ; CHECK:      %0 = COPY %w0
> +    ; CHECK-NEXT: %1 = ADDWrr %0, %0
> +    ; CHECK-NEXT: %w0 = COPY %1
> +    ; CHECK-NEXT: DBG_VALUE debug-use %1, debug-use _, !7, !9, debug-
> location !10
> +
> +    DBG_VALUE debug-use %1(s32), debug-use _, !7, !9, debug-location !10
> +...
> +
> +---
> +# CHECK-LABEL: name: test_dbg_value_dead
> +name:            test_dbg_value_dead
> +legalized:       true
> +regBankSelected: true
>  body: |
>    bb.0:
>      liveins: %w0
>      %0:gpr(s32) = COPY %w0
> 
> -    ; CHECK: DBG_VALUE debug-use %0, debug-use _, !7, !9, debug-location
> !10
> -    ; CHECK: DBG_VALUE _, 0, !7, !9, debug-location !10
> +    ; CHECK-NOT: COPY
> +    ; CHECK: DBG_VALUE debug-use _, debug-use _, !7, !9, debug-location
> !10
> 
>      DBG_VALUE debug-use %0(s32), debug-use _, !7, !9, debug-location !10
> -    DBG_VALUE _, 0, !7, !9, debug-location !10
>  ...
> 
> 
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