[PATCH] D30962: [GlobalISel] Translate shufflevector

[Ahmed Bougacha via Phabricator via llvm-commits]

ab added a comment.

We don't need to do this now, but should we encode the mask in the G_SHUFFLE_VECTOR itself?  Either as multiple Imm MOs, or a single new 'VectorMask' operand of some sort?



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Comment at: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll:1423
+; CHECK: [[C1:%[0-9]+]](s32) = G_CONSTANT i32 1
+; CHECK: [[RES:%[0-9]+]](s32) = G_SHUFFLE_VECTOR [[ARG]](<2 x s32>), [[UNDEF]], [[C1]](s32)
+; CHECK: %w0 = COPY [[RES]](s32)
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Should we turn this into an extractelt in the IRTranslator?  Seems like having vector ops 0,1,2 is a nice invariant.  (which would be nice to check in the verifier, or even in the MIR parser, if we ever add type constraints in GenericOpcodes.td)


https://reviews.llvm.org/D30962