[PATCH] D30038: [ADMGPU] SDWA peephole optimization pass.

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SIPeepholeSDWA.cpp:221
+    for (MachineOperand Def: ParentMI->defs()) {
+      for (MachineInstr &PotentialMI: MRI->use_instructions(Def.getReg())) {
+        // Check if this instructions are in same basic block
----------------
arsenm wrote:
> SamWot wrote:
> > arsenm wrote:
> > > I think this is too aggressive. I would expect to restrict the number of uses to fold. In a typical case if the shift has more than one use, you are increasing code size. I would also expect a legality check here, because if there is an unfoldable user, there's no point in folding any of them.
> > I agree that we should limit number of uses. This is what I wanted to say with "Introduce mnemonics to limit when SDWA patterns should apply".
> > One thing that I don't know is if one instruction uses register twice would it appear in `use_instructions()` twice ore single time.
> If you iterate uses you will see the same instruction for repeated uses. use_instructions skips to unique instructions
I still do not see a check for single use. Am I missing it somewhere?


https://reviews.llvm.org/D30038