[PATCH] D18046: [X86] Providing correct unwind info in function epilogue

[Violeta Vukobrat via Phabricator via llvm-commits]

violetav updated this revision to Diff 92010.
violetav added a comment.
Herald added a subscriber: mgorny.

Here is the current implementation of the proposed solution.
I have added a new flag to a MBB that represents its type based on its beginning and end cfi offset. There are 4 types of MBBs: PROLOGUE, EPILOGUE, IN_PATH and OUT_PATH. Default type of the MBB is IN_PATH. During prologue and epilogue emission in X86FrameLowering, corresponding MBBs are set as PROLOGUE and EPILOGUE, and also, MBBs that are not in the prologue/epilogue path are marked as OUT_PATH. There are changes in some of the passes that split or merge MBBs, where these types are updated correctly. There is also a late pass that inserts additional CFI instructions to the beginnings of the MBBs for the cases where epilogue is in the middle of the function and sets incorrect CFI offset and register values for those MBBs.
Does this look like a step in the right direction? Does anyone have any comments?


Repository:
  rL LLVM

https://reviews.llvm.org/D18046

Files:
  include/llvm/CodeGen/MachineBasicBlock.h
  lib/CodeGen/BranchFolding.cpp
  lib/CodeGen/TailDuplicator.cpp
  lib/CodeGen/TargetInstrInfo.cpp
  lib/Target/X86/CMakeLists.txt
  lib/Target/X86/X86.h
  lib/Target/X86/X86CFIInstrInserter.cpp
  lib/Target/X86/X86FrameLowering.cpp
  lib/Target/X86/X86TargetMachine.cpp
  test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
  test/CodeGen/X86/2011-10-19-widen_vselect.ll
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/avx512-i1test.ll
  test/CodeGen/X86/avx512-vbroadcast.ll
  test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
  test/CodeGen/X86/avx512bw-intrinsics.ll
  test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
  test/CodeGen/X86/avx512vl-vbroadcast.ll
  test/CodeGen/X86/block-placement.ll
  test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
  test/CodeGen/X86/clz.ll
  test/CodeGen/X86/conditional-tailcall.ll
  test/CodeGen/X86/emutls-pie.ll
  test/CodeGen/X86/emutls.ll
  test/CodeGen/X86/fast-isel-store.ll
  test/CodeGen/X86/fp-une-cmp.ll
  test/CodeGen/X86/fp128-select.ll
  test/CodeGen/X86/frame-lowering-debug-intrinsic-2.ll
  test/CodeGen/X86/frame-lowering-debug-intrinsic.ll
  test/CodeGen/X86/haddsub-2.ll
  test/CodeGen/X86/hipe-cc64.ll
  test/CodeGen/X86/hipe-prologue.ll
  test/CodeGen/X86/imul.ll
  test/CodeGen/X86/legalize-shift-64.ll
  test/CodeGen/X86/load-combine.ll
  test/CodeGen/X86/masked_gather_scatter.ll
  test/CodeGen/X86/memset-nonzero.ll
  test/CodeGen/X86/merge-consecutive-loads-128.ll
  test/CodeGen/X86/movtopush.ll
  test/CodeGen/X86/mul-i256.ll
  test/CodeGen/X86/pr21792.ll
  test/CodeGen/X86/pr29112.ll
  test/CodeGen/X86/pr30430.ll
  test/CodeGen/X86/pr9743.ll
  test/CodeGen/X86/push-cfi-debug.ll
  test/CodeGen/X86/push-cfi-obj.ll
  test/CodeGen/X86/push-cfi.ll
  test/CodeGen/X86/return-ext.ll
  test/CodeGen/X86/select_const.ll
  test/CodeGen/X86/setcc-lowering.ll
  test/CodeGen/X86/sse-scalar-fp-arith.ll
  test/CodeGen/X86/sse1.ll
  test/CodeGen/X86/statepoint-call-lowering.ll
  test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
  test/CodeGen/X86/statepoint-invoke.ll
  test/CodeGen/X86/switch-jump-table.ll
  test/CodeGen/X86/vec_int_to_fp.ll
  test/CodeGen/X86/vector-sext.ll
  test/CodeGen/X86/vector-shuffle-avx512.ll
  test/CodeGen/X86/vector-shuffle-v1.ll
  test/CodeGen/X86/wide-integer-cmp.ll
  test/CodeGen/X86/x86-framelowering-trap.ll

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