[PATCH] D30978: [DAGCombine] Bail out if can't create a vector with at least two elements

Zvi Rackover via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 15 12:56:08 PDT 2017


zvi updated this revision to Diff 91917.
zvi added a comment.

Rebase


Repository:
  rL LLVM

https://reviews.llvm.org/D30978

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/Generic/pr32278.ll


Index: test/CodeGen/Generic/pr32278.ll
===================================================================
--- test/CodeGen/Generic/pr32278.ll
+++ test/CodeGen/Generic/pr32278.ll
@@ -1,6 +1,4 @@
 ; PR32278
-; XFAIL: *
-; REQUIRES: asserts
 
 ; RUN: llc < %s
 
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14098,8 +14098,11 @@
       if (!SclTy.isFloatingPoint() && !SclTy.isInteger())
         return SDValue();
 
-      EVT NVT = EVT::getVectorVT(*DAG.getContext(), SclTy,
-                                 VT.getSizeInBits() / SclTy.getSizeInBits());
+      unsigned VNTNumElms = VT.getSizeInBits() / SclTy.getSizeInBits();
+      if (VNTNumElms < 2)
+        return SDValue();
+
+      EVT NVT = EVT::getVectorVT(*DAG.getContext(), SclTy, VNTNumElms);
       if (!TLI.isTypeLegal(NVT) || !TLI.isTypeLegal(Scalar.getValueType()))
         return SDValue();
 


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