[PATCH] D30440: AMDGPU: Fix unnecessary ands when packing f16 vectors

Konstantin Zhuravlyov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 15 09:58:24 PDT 2017


kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM.



================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2116
 
-  SDLoc DL(Op);
-  SDValue N0 = Op.getOperand(0);
-  assert (N0.getSimpleValueType() == MVT::f64);
+
+  assert(N0.getSimpleValueType() == MVT::f64);
----------------
Extra new line.


================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2119
+
 
   // f64 -> f16 conversion using round-to-nearest-even rounding mode.
----------------
Extra new line.


https://reviews.llvm.org/D30440





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