[PATCH] D30049: x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed

[David Kreitzer via Phabricator via llvm-commits]

DavidKreitzer added a comment.

> Can we verify how stack is aligned when there is an error code?

The documentation that Phil cited is pretty clear in this regard, HJ. In addition to the following text (where I removed some unrelated steps), there is figure 8-13.

> In long mode, when a control transfer to an interrupt handler occurs, the processor performs the
> following:
> 
> 1. Aligns the new interrupt-stack frame by masking RSP with FFFF_FFFF_FFFF_FFF0h. ...
> 2. Pushes the return stack pointer (old SS:RSP) onto the new stack. The SS value is padded with six bytes to form a quadword.
> 3. Pushes the 64-bit RFLAGS register onto the stack. The upper 32 bits of the RFLAGS image on the stack are written as zeros. ...
> 4. Pushes the return CS register and RIP register onto the stack. The CS value is padded with six bytes to form a quadword.
> 5. If the interrupt vector number has an error code associated with it, pushes the error code onto the stack. The error code is padded with four bytes to form a quadword.

So this patch LGTM. But I think you should get someone else to confirm the correctness of lines 962-970. Amjad, can you do that?

Thanks for your patience.


https://reviews.llvm.org/D30049