[PATCH] D30751: [MachineCopyForwarding] Add new pass to do register COPY forwarding at end of register allocation.

[Javed Absar via Phabricator via llvm-commits]

javed.absar added a comment.

Hi Geoff:

Thanks for this pass. If I understand correctly, its primary objective is to reduce reduce pressure?
I see only a few cases for ARM targets. Any particular reason why more cases don't benefit from your optimisation?



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Comment at: test/CodeGen/AArch64/arm64-zero-cycle-regmov.ll:7
 ; CHECK-LABEL: t:
-; CHECK: mov x0, [[REG1:x[0-9]+]]
-; CHECK: mov x1, [[REG2:x[0-9]+]]
+; CHECK: mov [[REG2:x[0-9]+]], x3
+; CHECK: mov [[REG1:x[0-9]+]], x2
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Would it be better to rewrite these as MIR tests?


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Comment at: test/CodeGen/AArch64/neg-imm.ll:9
 ; CHECK_LABEL: test:
 ; CHECK_LABEL: %entry
+; CHECK: subs [[REG0:w[0-9]+]],
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Would it be better adding new/separate test file instead of changing the purpose of this one ?


https://reviews.llvm.org/D30751