[llvm] r297557 - AMDGPU: Remove packf16 intrinsic

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Fri Mar 10 23:51:16 2017
New Revision: 297557

URL: http://llvm.org/viewvc/llvm-project?rev=297557&view=rev
Log:
AMDGPU: Remove packf16 intrinsic

Removed:
    llvm/trunk/test/CodeGen/AMDGPU/llvm.SI.packf16.ll
Modified:
    llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
    llvm/trunk/lib/Target/AMDGPU/SIIntrinsics.td

Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=297557&r1=297556&r2=297557&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Fri Mar 10 23:51:16 2017
@@ -2924,11 +2924,6 @@ SDValue SITargetLowering::LowerINTRINSIC
                                Op.getOperand(1), Op.getOperand(2));
     return DAG.getNode(ISD::BITCAST, DL, VT, Node);
   }
-  case AMDGPUIntrinsic::SI_packf16: { // Legacy name
-    EVT VT = Op.getValueType();
-    return DAG.getNode(AMDGPUISD::CVT_PKRTZ_F16_F32, DL, VT,
-                       Op.getOperand(1), Op.getOperand(2));
-  }
   default:
     return AMDGPUTargetLowering::LowerOperation(Op, DAG);
   }

Modified: llvm/trunk/lib/Target/AMDGPU/SIIntrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIIntrinsics.td?rev=297557&r1=297556&r2=297557&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIIntrinsics.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIIntrinsics.td Fri Mar 10 23:51:16 2017
@@ -14,8 +14,6 @@
 
 
 let TargetPrefix = "SI", isTarget = 1 in {
-  def int_SI_packf16 : Intrinsic <[llvm_i32_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
-
   def int_SI_export : Intrinsic <[],
     [llvm_i32_ty,   // en
     llvm_i32_ty,    // vm   (FIXME: should be i1)

Removed: llvm/trunk/test/CodeGen/AMDGPU/llvm.SI.packf16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/llvm.SI.packf16.ll?rev=297556&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/llvm.SI.packf16.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/llvm.SI.packf16.ll (removed)
@@ -1,28 +0,0 @@
-; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-
-; GCN-LABEL: {{^}}main:
-; GCN: v_cvt_pkrtz_f16_f32
-; GCN: v_cvt_pkrtz_f16_f32
-; GCN-NOT: v_cvt_pkrtz_f16_f32
-
-define amdgpu_ps void @main(float %src) {
-main_body:
-  %p1 = call i32 @llvm.SI.packf16(float undef, float %src)
-  %p2 = call i32 @llvm.SI.packf16(float %src, float undef)
-  %p3 = call i32 @llvm.SI.packf16(float undef, float undef)
-  %f1 = bitcast i32 %p1 to float
-  %f2 = bitcast i32 %p2 to float
-  %f3 = bitcast i32 %p3 to float
-  call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f1, float undef, float %f1)
-  call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f2, float undef, float %f2)
-  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float undef, float %f3, float undef, float %f2)
-  ret void
-}
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.SI.packf16(float, float) #0
-
-declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
-
-attributes #0 = { nounwind readnone }