[PATCH] D30472: [DAGCombine] Simplify ISD::AND in GetDemandedBits.

[Eli Friedman via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL297249: [DAGCombine] Simplify ISD::AND in GetDemandedBits. (authored by efriedma).

Changed prior to commit:
  https://reviews.llvm.org/D30472?vs=90536&id=90968#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D30472

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
  llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll
  llvm/trunk/test/CodeGen/X86/illegal-bitfield-loadstore.ll
  llvm/trunk/test/CodeGen/X86/xaluo.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D30472.90968.patch
Type: text/x-patch
Size: 12719 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170308/ebb2b04c/attachment.bin>