[PATCH] D30661: [x86] Split MXCSR into two pseudo-registers

[Eli Friedman via Phabricator via llvm-commits]

efriedma requested changes to this revision.
efriedma added a comment.

This isn't backward-compatible with existing IR which clobbers mxcsr.  You could auto-upgrade, I guess.  Alternatively, you could make the status bits a subregister of MXCSR instead of modeling it as two completely separate registers.

> A subsequent patch will update floating point operations to add an implicit use of the control bits and an implicit def of the status bits

This seems kind of confusing... strict floating-point ops need to implicitly use and def the status bits, because the new value depends on the previous value. You can think of an FP operation as a logical OR acting on the status register.  Many kinds of code motion are legal (e.g. you can reorder FP operations with each other, or hoist them out of loops).  But if you omit the use, other optimizations won't work correctly; for example, dead code elimination will eliminate FP operations which have a visible effect on the status register.

Given that, I'm not sure what splitting the status register buys you; I guess it becomes easier to check whether an instruction modifies the control bits?


Repository:
  rL LLVM

https://reviews.llvm.org/D30661