[PATCH] D30665: [InstSimplify] vector div/rem with any zero element in divisor is undef

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 6 15:15:57 PST 2017


spatel added a comment.

In https://reviews.llvm.org/D30665#693615, @mkuper wrote:

> In https://reviews.llvm.org/D30665#693613, @efriedma wrote:
>
> > > Would that mean that this transformation (very naive SLP vectorization) would become illegal:
> >
> > Why would that be illegal?  Both snippets have undefined behavior if and only if y1 or y2 is zero (or undef, or poison).
>
>
> Er, right, bad example. Let me think if I have a good one. What I'm aiming at is that I don't want to propagate undef from a lane that's never used into a lane that's actually used.


I had the same concern. I was remembering something like this:
https://bugs.llvm.org/show_bug.cgi?id=20059 
...but we solved that by limiting the transform with isSafeToSpeculativelyExecute(). That's what protects us from Bad Things with any div/rem. If there's some other transform that makes us use a value from a lane that shouldn't have been touched, then it must already be wrong?


https://reviews.llvm.org/D30665





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